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Table of Contents
Carbon SDR Advanced Users' Guide
FPGA
The Carbon SDR ships with multiple FPGA images.
- default
- griio
- dual
- default-chan
- dual-chan
Users may switch between FPGA images using the fpgaloader utility.
fpgaloader
fpgaloader is a tool for reloading the FPGA while Linux is running. This allows the user to switch between different FPGA images depending on the application.
The default image will be loaded if any GNU Radio block from gr-rwt is used. This provides users with source and sink blocks for the Carbon radio while running GNU Radio from Carbon system. The default image also supports the IIO interface, but has extra parameters which need to be set.
The gr-iio image allows the the user to stream data from the Carbon to the host PC for processing. This image must be loaded in the FPGA before running griio blocks.
To list available images type:
root@carbon:~# fpgaloader list
To switch images type:
root@carbon:~# fpgaloader switch [IMAGE NAME]
For help on all fpgaloader commands type:
root@carbon:~# fpgaloader --help
default FPGA Image
The default image is loaded when the Carbon boots. This image allows the user to use the RWT Sink, RWT Source, and RWT Source (Short) blocks when running GNU Radio on the Carbon.
griio FPGA Image
The griio image is used to remotely access the RWT Carbon SDR from the host computer. This mode can be set by using the following commands:
root@oxygen:~# fpgaloader switch griio root@oxygen:~# systemctl restart iiod
Next, on a host computer with iiod and/or gr-iio installed you can access the radio using the directions from Analog Devices and URI of ip:192.168.10.1
Using this image it is also possible to use pyadi-iio or libiio directly to control the radio without using GNU Radio.
dual FPGA Image
The dual image only works with Carbon. This image activates both radios. This image allows the user to use the RWT Dual Sink and RWT Dual Source when running GNU Radio on the Carbon.
Custom FPGA Images
Users can create custom FPGA images using Xilinx tools and OpenEmbedded/Yocto to create the dtb files. More information is available at the custom FPGA image and custom OpenEmbedded/Yocto build pages. This is an extremely advanced development option and familiarity with git, OpenEmbedded/Yocto, git is required.